Reply
Highlighted
Visitor
Posts: 2
Registered: ‎01-24-2013
Accepted Solution

FMC - DVI I/O CARD for VC707 board

Hi,

I would like to know if FMC - DVI I/O CARD is compatible with VC707 board.

Currently i have video design working on KC705 board with given FMC card and want to migrate the design to VC707 board. 

 

Thanks

Avinash

Avnet Employee (Star Contributor)
Posts: 470
Registered: ‎04-16-2009

Re: FMC - DVI I/O CARD for VC707 board

Avinash,

 

What is the voltage of VADJ on the VC707 board ?

 

The FMC-DVI module supports VADJ of 3.3V or 2.5V.

If the VC707 only supports VADJ of 1.8V, then it will not work.

 

Can you share your pin LOC constraints for the KC705 + FMC-DVI hardware combination with the community ?

This would be appreciated by all, I am certain.

 

Regards,

 

Mario.

Visitor
Posts: 2
Registered: ‎01-24-2013

Re: FMC - DVI I/O CARD for VC707 board

Here is pin lOCs of FMC card for KC705

 

# FMC
###########################################
NET i2c_scl LOC = K21 | IOSTANDARD = LVCMOS25 | SLEW = SLOW | TIG;
NET i2c_sda LOC = L21 | IOSTANDARD = LVCMOS25 | SLEW = SLOW | TIG;
NET i2c_power_good LOC = H29 | IOSTANDARD = LVCMOS25;


# Added for RevC board
CONFIG DCI_CASCADE = "33 32 34";

##--------------------------------------------------------------------------------------------------------
## DVI IN - 1, FMC LPC Constraints
##--------------------------------------------------------------------------------------------------------
# HPC dvi in pixels clock
net DVI_IN_0_fmc_hpc_dvidp_dvii_clk_pin TNM_NET = DVI_IN_0_fmc_hpc_dvidp_dvii_clk_pin;
timespec TS_DVI_IN_0_fmc_hpc_dvidp_dvii_clk_pin = period DVI_IN_0_fmc_hpc_dvidp_dvii_clk_pin 6 ns;

# OFFSET_IN for dvi interface signals w.r.t dvi in clock ######
inst "DVI_IN_0_fmc_hpc_dvidp_dvii_*" TNM = DVI_IN_AXI_STRM_OUT_0_GRP;
timegrp "DVI_IN_AXI_STRM_OUT_0_GRP" offset = IN 1 ns VALID 6 ns BEFORE "DVI_IN_0_fmc_hpc_dvidp_dvii_clk_pin" rising;

NET DVI_IN_0_fmc_hpc_dvidp_dvii_clk_pin LOC = "AB27" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA17_CC_P" D20 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_de_pin LOC = "AK25" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA10_N" C15 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_vsync_pin LOC = "AB20" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA12_N" G16 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_hsync_pin LOC = "AE25" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA11_P" H16 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_blue_pin[0] LOC = "AC26" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA25_P" G27 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_blue_pin[1] LOC = "AG28" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA21_N" H26 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_blue_pin[2] LOC = "AK29" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA26_P" D26 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_blue_pin[3] LOC = "AJ28" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA27_P" C26 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_blue_pin[4] LOC = "AH27" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA23_N" D24 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_blue_pin[5] LOC = "AK28" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA22_N" G25 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_blue_pin[6] LOC = "AJ27" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA22_P" G24 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_blue_pin[7] LOC = "AG27" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA21_P" H25 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_green_pin[0] LOC = "AK26" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA19_N" H23 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_green_pin[1] LOC = "AH26" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA23_P" D23 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_green_pin[2] LOC = "AD27" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA18_CC_P" C22 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_green_pin[3] LOC = "AC27" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA17_CC_N" D21 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_green_pin[4] LOC = "AF27" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA20_N" G22 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_green_pin[5] LOC = "AF26" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA20_P" G21 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_green_pin[6] LOC = "AJ26" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA19_P" H22 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_green_pin[7] LOC = "AD24" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA15_N" H20 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_red_pin[0] LOC = "AC24" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA15_P" H19 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_red_pin[1] LOC = "AD22" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA16_N" G19 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_red_pin[2] LOC = "AE21" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA14_N" C19 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_red_pin[3] LOC = "AD21" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA14_P" C18 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_red_pin[4] LOC = "AC25" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA13_N" D18 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_red_pin[5] LOC = "AC22" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA16_P" G18 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_red_pin[6] LOC = "AF25" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA11_N" H17 on J2
NET DVI_IN_0_fmc_hpc_dvidp_dvii_red_pin[7] LOC = "AB24" | IOSTANDARD = "LVCMOS25" ; ## "FMC_LPC_LA13_P" D17 on J2

Avnet Employee (Star Contributor)
Posts: 470
Registered: ‎04-16-2009

Re: FMC - DVI I/O CARD for VC707 board

Thank you !