07-27-2016 01:29 PM
I have been running a design on ZC706 which was based on the ADI design for zc706:
With that I am able to run ubunutu linux, and have the arm and linux intereact with my processing logic in the FPGA fabric.
I now need to add the ability to take a feed from HDMI and bring it to the memory and then have the processing logic operate on it. However I have been having trouble getting that to work. I have tried two different routes:
1. One was to pick the FMC HMDI core from the HDMI passthrough design, connect it to a VDMA and add these to my AXI based sub-system (I am using vivado). The problem there is how to I configure the HDMI and VDMA - the FMA passthrough example is baremetal and I am in linux.
2. Then I also tried to take a different route and start from the petalinux based zc702 design and port that to zc706. With the help of some previous threads that I and others had started in past, I did the pin remapping from zc702 to zc706 and modified the zc702 design based on that. I am able to build the bitstream for that design but when I build petalinux using that design and then try to launch it on the board then linux doesn't boot.
Could somoene help me with getting either of these options to work. I thoguht that the second route should have been pretty straightforward but I am stuck even after spending many weeks on these paths.
08-07-2016 02:22 PM
Have you looked at the reference design that's available in xapp1287 with regards on how to configure the HDMI subsystem? This design uses a MicroBlaze core to control the video path. I haven't looked at the code but I think MicroBlaze mainly manages the dynamic control of the video PHY for all of the rates that are supported. You'll want to leave this portion in tact since it requires real time operation. You could modify the design such that the control interface is managed by Linux on the A9(s).
This design does not have a VDMA but you could remove the test pattern / bypass block and use the HP AXI connection to the PS to stream the data to the PS DDR.
Here is a link to the app note: http://www.xilinx.com/support/documentation/application_notes/xapp1287-hdmi-on-fpga-gtx-transceivers...
I hope this helps.
08-08-2016 05:26 AM
The best place to start is the ZC706 version of the Xilinx Base TRD.
Xilinx did not publish a ZC706 version of the foundation design.
However, they have published an SDSoC platform, which builds on top of the Base TRD design.
Even if you are not using SDSoC, you will still find the components that may serve as reference for your design.
08-12-2016 10:58 AM - edited 08-12-2016 10:58 AM
Thanks for the pointers. I was actually able to get the ZC702 vivado design running on ZC706 a few days ago.
Now that I have done the changes, it is clear that for someone who is experienced in working with Zynq boards and the Zynq Linux design flow, it is very little work to port the design from 702 to 706. Yet there are many like myself who have spent countless hours on this. It would have been great if Xilinx / Avnet had created a flavor of the design for zc706 considering how much little work it is going to be for them. In fact the script for creating the project already has support for zc706 as a target. The only thing that's missing is the pin constraints file for zc706 and the PS7 config file for ZC706. Moreover the devicetree file requires a couple of small edits. And thats it.
I will do another post soon in which I include the required script files for zc706 along with instructions for others who might be trying to do this port and having issues.