06-19-2017 01:34 AM
I've been able to get the basic passthru design working with a HDMI source and sink. I've broken out the AXI4S bus between the OSD block and the AXI4S to video converter. Should it be possible to remove the chroma data here with combinational logic? I've tried a slice/const/concat arrangement, this doesnt seem to work. Could this be causing timing problems?
06-26-2017 02:36 AM
Solved this by removing the SDCARD from the Zedboard, having 2 sources of bit file without fulling resetting was causing configuration problems with the FPGA. Removing and HDMI sinks and sources prior to running the application and reconnecting them also seemed to help.