01-10-2013 03:44 AM - edited 01-10-2013 03:44 AM
I have custom board with XC6SLX45 and dual DP83640 that is better suted for debugging than S6LX16 board. I inserted Chipscope ILA core with signals wired to XPS_ETHERNETLITE RX interface. It changed layout inside of FPGA and now MII loopback to DP83640 works fine. So it is XST synthesis and routing problem, rather than ISMNET card schematics or DP83640 PHY. so it is better to post it Xilinx forum rather than here.
Thank you, ltest10