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Visitor
Posts: 3
Registered: ‎05-11-2016

AES-A7EV-7A50T-G Ethernet PHY address

Hello,

 

I'm using the AES-A7EV-7A50T-G Board with Ethercat and the information about the PHYs' addresses is inconsistent in the 7A50T_User_Guide:

Page 10: PHY1 address is 0x11 and PHY2 address is 0x10.

Page 11/Figure 8: PHY1 ADDRESS = 0X11; PHY2 ADDRESS = 0X01

Which information is right?

 

Thanks & BR

Martin

Avnet Employee (Super Contributor)
Posts: 79
Registered: ‎04-17-2009

Re: AES-A7EV-7A50T-G Ethernet PHY address

Hi Martin,

Pages 10 & 11 of the User Guide are both incorrect.  For Rev C of the board (which is what you should have), the PHY addresses are:
PHY1 (U7) == 0x13

PHY2 (U9) == 0x12

The addresses are described correctly in the schematics available here (scroll to the Documents section at bottom of the page):
https://products.avnet.com/shop/en/ema/kits-and-tools/development-kits/aes-a7ev-7a50t-g-307445734562...

I will get the User Guide updated as soon as possible.

 

Thanks!

Tom

 

 

 

--
Tom Curran