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AES-A7EV-7A50T-G LED D7 and D8

What is the meaning of the two leads mentioned in 2.8 User LEDs (page 14) in the 7A50T_User_Guide:

2 Ethernet status LEDs D7 and D8 (active low)are used with Industrial Ethernet protocols to indicate an error condition and link status. These LEDs are driven from the IE MAC IP in the FPGA.

They are not mentioned in the Board definition files, or the master XDC file - which port are they connected to?

 

Thanks & BR

Martin

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Posts: 78
Registered: ‎04-17-2009

Re: AES-A7EV-7A50T-G LED D7 and D8

Ther EtherCAT slave FPGA IP core has an output port that indicates link status of the EtherCAT connection.  These LEDs are connected to that port.  You can see the connections in the schematics here (scroll to the Documents section at the bottom of the page):

https://products.avnet.com/shop/en/ema/kits-and-tools/development-kits/aes-a7ev-7a50t-g-307445734562...

 

When using the standard Xilinx AXI_EthernetLite EMAC IP these LEDs are driven by the Ethernet PHYs.

--Tom

 

--
Tom Curran