10-28-2009 04:05 AM
Currently i'm designing a part of test platform for a new wireless communication standard. In order to send data to and from a transmitter i'm using a Virtex 5 FPGA (FX70T) and its GTX transceivers. This standard requires a 2 bit interface between transmitter and FPGA.
For TX side this works perfectly. All data send by GTXs on one tile is well aligned and synchronized. Nevertheless on RX side i got some trouble. Even though the received serial bit stream is aligned too, the parallel output of both GTXs is not aligned any more.
I could fix this by using internal Channel Bonding and comma aligning circuitry. Actually that worked quiet well, as i directly looped back all data traffic from TX side to RX side and slightly extended the standardized data protocol. These Extensions were just sending preamble data and an aligning character on both GTX lines. However due to coding specification the final device can't transmit this extensions while keeping in compliance with this standard.
Therefore i want to modify the configuration of GTXs to properly decode this well aligned bitstream by sending all preamble and
alignment information only on one line. To achieve this i want to assign one transmitter as alignment master and synchronizing the second one as slave on this master GTX.
Basically my main issue is the Oversample unit, because data is transmitted with a relative low symbol rate of 625 MHz. The CDR
part should operate fine, because its operation is fixed to a constant sampling point. (If i correctly read the GTX Manual.) Thus i need to synchronize the Oversamplers of both GTXs.
Do you know a way to do that?
Everything else should be manageable. Even comma aligning could be easily done in FPGA fabric. Operation of elastic buffers should be the same as well, if no clock correction and channel bonding is used. Finally this would eleminate every source of variable delay and synchronize the parts having it.
Thank you for reading all this and maybe for help as well
10-29-2009 10:17 AM
The GTX doesn't support channel bonding this way. The slave GTX needs to know it's internal rotating buffer pointer location in relation to the bonding sequence in the master. Given that they both left the transmitter at the same time, this relationship is known. Without a bonding sequence in the slave, there is no reference point for the buffer pointer.
11-30-2009 10:17 AM
One thing you might try is running the receive side in a minimum latency mode. You will also need to match the lengths of the transmission lines and reset the buffer pointers simultaneously and operate the system on both the transmit and receive side synchronously.