Posts: 3
Registered: ‎09-14-2009

DDR2 ucf


I tried to test the DDR2 memory... So I generated DDR2 controller using MIG2.3..

The generated example contains ucf file..

However, the pin location of the generated ucf is different with the schematic(sheet 17-FPGA Bank 3).


My question is;


1) Should I have to change all the LOC of the generated ucf in accordance with the schemetic?

2) Or, can I get the ucf fie in your web site?

Avnet Employee (Star Contributor)
Posts: 471
Registered: ‎04-16-2009

Re: DDR2 ucf

As an informative comment, the DDR2 portion of the Spartan3A-DSP DaVinci Board is the same as the Spartan3A-DSP Starter Kit.

You can reuse this portion of the design (pinout, UCF, etc... ) without modification.


Specifically for the DaVinci board, we have reference designs on the DRC ( which use the external DDR2 memory:

    ISE Design Suite 10.1

      > EDK Demos for Xilinx Spartan-3A DSP FPGA DaVinci Development Kit

Although these designs are video-based design requiring the EXP-PSVIDEO module,

the UCF content that you are looking for can be reused from these designs.