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Visitor
Posts: 3
Registered: ‎09-14-2009

Vlynq test problem...

Hi,

We use Spartan3A-DSP DaVinci Board for our project.

Theseday I suffered from the VLYNQ test..

I want the address translation between DSP and FPGA.

If I wrote data on the address of 4C00:0000, how can I calculate the address of OPB site(in FPGA) ?

Avnet Employee (Star Contributor)
Posts: 471
Registered: ‎04-16-2009

Re: Vlynq test problem...

The DSP's VLYNQ base address of 4C00:0000 will translate to 0000:0000 on the OPB bus inside the FPGA.

 

If you want, you can observe this with ChipScope.

 

In the default FPGA design:

   C:\avnet_s3adsp_dm6437_1_07\bsl\fpga\ise\davinci_coprocessor\davinci_coprocessor.ise

 

Modify the following configuration package to enable ChipScope debug of the VLYNQ interface:

   C:\avnet_s3adsp_dm6437_1_07\bsl\fpga\rtl\top_level\davinci_coprocessor_config.vhd

         constant IncludeVlynqDebug_c     : boolean := TRUE;

 

Rebuild the FPGA design and use the following ChipScope project to observe the OPB transactions generated by the VLYNQ core inside the FPGA:

   C:\avnet_s3adsp_dm6437_1_07\bsl\fpga\chipscope\davinci_coprocessor_vlynq_debug.cpj

 

Regards,

 

Mario.

Visitor
Posts: 3
Registered: ‎09-14-2009

Re: Vlynq test problem...

Thank you...

We solved the problem...^^

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Avnet Employee (Star Contributor)
Posts: 471
Registered: ‎04-16-2009

Re: Vlynq test problem...

Excellent !