05-12-2011 02:10 AM
We are using spartan6 FPGA +OMAP based board. We are planning to use UPP interface between OMAP and FPGA. We planned to use channel A as a bidirectional bus. OMAP initially transmit some data (around 100 cycles) to FPGA and later it will start receive data streaming from FPGA.
My Question is is it possible to configure single channel as both transmitter and Receiver.
05-13-2011 10:34 AM
The uPP DSP/BIOS driver required the UPP interface to configured as transmitter OR receiver.
During run-time initialization, the following call determines the direction of both of the uPP interfaces
GIO_Handle upph = GIO_create("/UPP", IOM_INOUT, &status, &upp_setup, NULL);
Since the direction of the uPP interface is determined at run time, it should be possible to change the direction of the uPP interface by closing (GIO_delete), then re-initializing (GIO_create) the uPP interfaces.
However, you will need to ensure that the FPGA changes the pin directions and does not start transmitting until the DSP has re-initialized the interface ndd initiated a receive call.
Here are some very useful wiki pages on the subject of UPP.
08-14-2014 08:06 AM
How quickly can the UPP bus be changed between read and write? I don't see a spec in the datasheet for changing the bus from read to write. What is the fastest the UPP bus can be turned around?