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Posts: 5
Registered: ‎07-31-2014

FMC150 spi interface behaviour

Hi, I'm asking regarding the behaviour of FMC150 spi interface, as I have found that the data placed on spi to AMC7823 from reference design is located on the rising edge of the spi clock. While from TI datasheet, it should be on falling edge. Also, I am having difficulty to read the AMC7823 register data back to fpga, therefore I would like to ask, do I need to raise the MON_N_EN = '1' after sending over the read instruction before  able to get the register content back. The reason I ask this it because the datasheet shows once the read instruction is sent over, the data is immediately available at MISO without need to rising MON_N_EN to '1'. Really appreciate your guidance, thank you.