08-07-2014 09:16 AM
Hi, I have limited experience and knowledge on fpga design, and I am facing 'Found 0 Core Units in the JTAG device Chain' problem trying out the reference design tutorial. The reference design version I've downloaded is 13.1, and I've tried to regenerated all the core ips to the newer version but still not working. The latest finding I've got is missing .sym for ILA, ICON, VIO, DDS, and clocking wizard, but I have no idea what these files are. Hope someone can guide me through the migration process. Thank you.
08-07-2014 10:39 AM
Finally got it sort out myself, refer to the steps below:
1. right click on 'generate programming file'
2. click process properties
3. choose configuration options
4. choose property display level: advanced (at the bottom of the window)
5. scroll down and find -g next_config_addr:
6. change it from 0x000000 to 'None' (0x000000 wouldn't work for ise 13.2 onwards)