Regular Visitor
Posts: 9
Registered: ‎02-07-2012

Suggested clocking scheme for ML605+FMC150



I have a couple of questions regarding the clocking scheme used in ML605+FMC150 RTL eference design. It uses MMCM for generating two separate clocks, one at integral values of 100MHz and the other at 245.76 MHz.


1. If I use EDK to create an embedded design with Microblaze and DDR3 memory with the above stated reference design imported as a custom peripheral, will the clock_generator used in EDK create any conflict with MMCM instantiations in ISE design? 


2. How can I avoid any UCF conflicts?